XC9536XL-10VQG64C点击型号即可查看芯片规格书
XC9536XL-10VQG64C 中文资料规格参数
| 技术参数 | 频率 | 100 MHz |
电源电压(DC) | 3.00V (min) | |
针脚数 | 64 | |
I/O引脚数 | 36 | |
输入/输出数 | 36 Input | |
工作温度(Max) | 70 ℃ | |
工作温度(Min) | 0 ℃ | |
电源电压 | 3.3 V | |
电源电压(Max) | 3.6 V | |
电源电压(Min) | 3 V | |
| 封装参数 | 安装方式 | Surface Mount |
引脚数 | 64 | |
封装 | TQFP-64 | |
| 外形尺寸 | 封装 | TQFP-64 |
| 物理参数 | 工作温度 | 0℃ ~ 70℃ (TA) |
| 其他 | 产品生命周期 | Active |
包装方式 | Tray | |
制造应用 | Computers & Computer Peripherals, 工业, 通信与网络, Communications & Networking, Industrial, 计算机和计算机周边 | |
| 符合标准 | RoHS标准 | RoHS Compliant |
含铅标准 | Lead Free | |
REACH SVHC标准 | No SVHC |
XC9536XL-10VQG64C 引脚图 | 封装焊盘图
XC9536XL-10VQG64C 引脚图
XC9536XL-10VQG64C 封装焊盘图
产品概述
XILINX XC9536XL-10VQG64C 芯片, CMOS ISP 闪存CPLD
TheXC9536XL-10VQG64Cis a high-performance CMOS ISP Flash CPLD targeted for high-performance, low-voltage applications. It is comprised of two 54V18 function blocks, providing 800 usable gates with propagation delays of 5ns. Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading. To help reduce power dissipation, each macro cell in a XC9500XL device may be configured for low-power mode (from the default high-performance mode). In addition, unused product-terms and macro cells are automatically deactivated by the software to further conserve power.
.Low power operation
.Fast FLASH™ technology
.In-System Programmable
.Local clock inversion with three global and one product-term clocks
.Individual output enable per output pin
.Input hysteresis on all user and boundary-scan pin inputs
.Bus-hold circuitry on all user pin inputs
.Fast concurrent programming
.Slew rate control on individual outputs
.Enhanced data security
.Excellent quality and reliability
.0 to 70°C Operating temperature range
ESD sensitive device, take proper precaution while handling the device.
